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 19-3379; Rev 2; 12/04
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
General Description
The MAX5477/MAX5478/MAX5479 nonvolatile, dual, linear-taper, digital potentiometers perform the function of a mechanical potentiometer, but replace the mechanics with a simple 2-wire digital interface. Each device performs the same function as a discrete potentiometer or variable resistor and has 256 tap points. The devices feature an internal, nonvolatile EEPROM used to store the wiper position for initialization during power-up. A write-protect feature prevents accidental overwrites of the EEPROM. The fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing interconnection complexity in many applications. Three address inputs allow a total of eight unique address combinations. The MAX5477/MAX5478/MAX5479 provide three nominal resistance values: 10k (MAX5477), 50k (MAX5478), or 100k (MAX5479). The nominal resistor temperature coefficient is 35ppm/C end-to-end and 5ppm/C ratiometric. The low temperature coefficient makes the devices ideal for applications requiring a lowtemperature-coefficient variable resistor, such as lowdrift, programmable gain-amplifier circuit configurations. The MAX5477/MAX5478/MAX5479 are available in 16pin 3mm x 3mm x 0.8mm thin QFN and 14-pin 4.4mm x 5mm TSSOP packages. These devices operate over the extended -40C to +85C temperature range.
Features
Power-On Recall of Wiper Position from Nonvolatile Memory EEPROM Write Protection Tiny 3mm x 3mm x 0.8mm Thin QFN Package 35ppm/C End-to-End Resistance Temperature Coefficient 5ppm/C Ratiometric Temperature Coefficient Fast 400kbps I2C-Compatible Serial Interface 1A (max) Static Supply Current Single-Supply Operation: +2.7V to +5.25V
MAX5477/MAX5478/MAX5479
256 Tap Positions per Potentiometer 0.5 LSB DNL in Voltage-Divider Mode 1 LSB INL in Voltage-Divider Mode
Functional Diagram
VDD GND HA 8-BIT SHIFT REGISTER 8 16-BIT LATCH 8 256 POSITION DECODER 256 WA
POR SDA SCL WP A0 A1 A2 I2C INTERFACE 16-BIT NV MEMORY
LA HB 8 256 POSITION DECODER 256 WB
Applications
Mechanical Potentiometer Replacement Low-Drift Programmable-Gain Amplifiers Volume Control Liquid-Crystal Display (LCD) Contrast Control
MAX5477 MAX5478 MAX5479
LB
Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
Ordering Information/Selector Guide
PART MAX5477ETE* MAX5477EUD* MAX5478ETE* MAX5478EUD MAX5479ETE* TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 16 Thin QFN 14 TSSOP 16 Thin QFN 14 TSSOP 16 Thin QFN END-TO-END RESISTANCE (k) 10 10 50 50 100 100 TOP MARK ABO -- ABP -- ABQ -- PACKAGE CODE T1633F-3 -- T1633F-3 -- T1633F-3 --
MAX5479EUD -40C to +85C 14 TSSOP *Future product--contact factory for availability.
Pin Configurations appear at end of data sheet. 1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
ABSOLUTE MAXIMUM RATINGS
SDA, SCL, VDD to GND .........................................-0.3V to +6.0V All Other Pins to GND.................................-0.3V to (VDD + 0.3V) Maximum Continuous Current into H_, L_, and W_ MAX5477......................................................................5.0mA MAX5478......................................................................1.3mA MAX5479......................................................................0.6mA Continuous Power Dissipation (TA = +70C) 16-Pin Thin QFN (derate 17.5mW/C above +70C) 1399mW 14-Pin TSSOP (derate 9.1mW/C above +70C) .........727mW Operating Temperature Range ...........................-40C to +85C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C.) (Note 1)
PARAMETER Resolution Integral Nonlinearity Differential Nonlinearity Dual Code Matching End-to-End Resistance Temperature Coefficient Ratiometric Resistance Temperature Coefficient MAX5477 Full-Scale Error MAX5478 MAX5479 MAX5477 Zero-Scale Error MAX5478 MAX5479 DC PERFORMANCE (VARIABLE-RESISTOR MODE) Integral Nonlinearity (Note 3) INL VDD = 3V VDD = 5V VDD = 3V, MAX5477, guaranteed monotonic Differential Nonlinearity (Note 3) DNL VDD = 3V, MAX5478 VDD = 3V, MAX5479 VDD = 5V Dual Code Matching R0 and R1 set to same code (all codes), VDD = 3V or 5V RW CW MAX5477 End-to-End Resistance RHL MAX5478 MAX5479 7.5 37.5 75 (Note 4) 325 10 10 50 100 12.5 62.5 125 k 3 1.5 1 1 1 1 3 LSB LSB LSB TCR INL DNL (Note 2) (Note 2) R0 and R1 set to same code (all codes) 35 5 -3 -0.6 -0.3 3 0.6 0.3 LSB LSB SYMBOL CONDITIONS MIN TYP 256 1 0.5 1 MAX UNITS Taps LSB LSB LSB ppm/C ppm/C
DC PERFORMANCE (VOLTAGE-DIVIDER MODE)
DC PERFORMANCE (RESISTOR CHARACTERISTICS) Wiper Resistance Wiper Capacitance 675 pF
2
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Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C.) (Note 1)
PARAMETER DIGITAL INPUTS Input High Voltage (Note 5) Input Low Voltage Output Low Voltage WP Pullup Resistance Input Leakage Current Input Capacitance DYNAMIC CHARACTERISTICS Crosstalk 3dB Bandwidth (Note 6) Total Harmonic Distortion Plus Noise Data Retention Endurance POWER SUPPLY Power-Supply Voltage VDD Writing to EEPROM, digital inputs at GND or VDD (Note 7) Normal operation, digital WP = GND inputs at GND or VDD WP = VDD 2.70 250 15 0.5 5.25 400 20.6 1 A V THD+N HA = 1kHz (0 to VDD), LA = GND, LB = GND, measure WB MAX5478 MAX5479 H_ = 1VRMS, f = 1kHz, L_ = GND, measure W_ TA = +85C TA = +25C TA = +85C -80 100 50 0.003 dB kHz % VIH VIL VOL IWP ILEAK 5 VDD = 3.4V to 5.25V VDD < 3.4V (Note 5) ISINK = 3mA 255 1 2.4 0.7 x VDD 0.8 0.4 V V V k A pF SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5477/MAX5478/MAX5479
NONVOLATILE MEMORY RELIABILITY 50 200,000 50,000 Years Stores
Supply Current
IDD
TIMING CHARACTERISTICS
(VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C. See Figure 1.) (Notes 8 and 9)
PARAMETER ANALOG SECTION Wiper Settling Time (Note 10) DIGITAL SECTION SCL Clock Frequency Setup Time for START Condition Hold Time for START Condition fSCL tSU:STA tHD:STA 0.6 0.6 400 kHz s s tWS MAX5478 MAX5479 500 1000 ns SYMBOL CONDITIONS MIN TYP MAX UNITS
_______________________________________________________________________________________
3
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
TIMING CHARACTERISTICS (continued)
(VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25C. See Figure 1.) (Notes 8 and 9)
PARAMETER SCL High Time SCL Low Time Data Setup Time Data Hold Time SDA, SCL Rise Time SDA, SCL Fall Time Setup Time for STOP Condition Bus Free Time Between STOP and START Condition Pulse Width of Spike Suppressed Capacitive Load for Each Bus Line Write NV Register Busy Time SYMBOL tHIGH tLOW tSU:DAT tHD:DAT tR tF tSU:STO tBUF tSP CB (Note 11) (Note 12) Minimum power-up rate = 0.2V/s 0.6 1.3 50 400 12 CONDITIONS MIN 0.6 1.3 100 0 0.9 300 300 TYP MAX UNITS s s ns s ns ns s s ns pF ms
Note 1: All devices are production tested at TA = +25C and are guaranteed by design and characterization for -40C < TA < +85C. Note 2: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H_ = VDD and L_ = GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter. Note 3: The DNL and INL are measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For VDD = +5V, the wiper is driven with 400A (MAX5477), 80A (MAX5478), or 40A (MAX5479). For VDD = +3V, the wiper is driven with 200A (MAX5477), 40A (MAX5478), or 20A (MAX5479). Note 4: The wiper resistance is measured using the source currents given in Note 3. Note 5: The devices draw current in excess of the specified supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND + 0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics. Note 6: Wiper at midscale with a 10pF load (DC measurement). L_ = GND, an AC source is applied to H_, and the W_ output is measured. A 3dB bandwidth occurs when the AC W_/H_ value is 3dB lower than the DC W_/H_ value. Note 7: The programming current exists only during power-up and EEPROM writes. Note 8: The SCL clock period includes rise and fall times (tR = tF). All digital input signals are specified with tR = tF = 2ns and timed from a voltage level of (VIL + VIH) / 2. Note 9: Digital timing is guaranteed by design and characterization, and is not production tested. Note 10: This is measured from the STOP pulse to the time it takes the output to reach 50% of the output step size (divider mode). It is measured with a maximum external capacitive load of 10pF. Note 11: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the I2C-bus specification document linked to this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf Note 12: The idle time begins from the initiation of the STOP pulse.
4
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Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
Typical Operating Characteristics
(VDD = +5V, H_ = VDD, L_ = GND, TA = +25C, unless otherwise noted.)
MAX5477/MAX5478/MAX5479
SUPPLY CURRENT vs. TEMPERATURE
MAX5477/78/79 toc01
WIPER RESISTANCE vs. INPUT CODE
450 400 WIPER RESISTANCE () 350 300 250 200 150 100 50 0
MAX5477/78/79 toc02
TAP-TO-TAP SWITCHING TRANSIENT
MAX5477/78/79 toc03
1.0 0.9 0.8 SUPPLY CURRENT (A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -15 10 35 60 VDD = 3V VDD = 5V
500
SDA 2V/div
W_ 20mV/div MAX5478 CL = 10pF H_ = VDD FROM TAP 00 TO TAP 04 0 32 64 96 128 160 192 224 256 1s/div
85
TEMPERATURE (C)
INPUT CODE
TAP-TO-TAP SWITCHING TRANSIENT
MAX5477/78/79 toc04
WIPER TRANSIENT AT POWER-ON
MAX5477/78/79 toc05
WIPER TRANSIENT AT POWER-ON
MAX5477/78/79 toc06
SDA 2V/div
VDD 2V/div
VDD 2V/div
MAX5479 CW_ = 10pF H_ = VDD FROM TAP 00 TO TAP 04 400ns/div
W_ 20mV/div MAX5478 TAP = 128 4s/div
W_ 1V/div MAX5479 TAP = 128 2s/div
W_ 1V/div
INTEGRAL NONLINEARITY vs. CODE (VDM MODE)
MAX5477/78/79 toc07
DIFFERENTIAL NONLINEARITY vs. CODE (VDM MODE)
MAX5477/78/79 toc08
INTEGRAL NONLINEARITY vs. CODE (VRM MODE)
MAX5478 0.2 0.1 INL (LSB) 0 -0.1 -0.2 -0.3
MAX5477/78/79 toc09
0.3 MAX5478 0.2 0.1 0 -0.1 -0.2 -0.3 0 32 64 96
0.3 MAX5478 0.2 0.1 DNL (LSB) 0 -0.1 -0.2 -0.3
0.3
INL (LSB)
128 160 192 224 256 CODE
0
32
64
96
128 160 192 224 256 CODE
0
32
64
96
128 160 192 224 256 CODE
_______________________________________________________________________________________
5
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
Typical Operating Characteristics (continued)
(VDD = +5V, H_ = VDD, L_ = GND, TA = +25C, unless otherwise noted.)
DIFFERENTIAL NONLINEARITY vs. CODE (VRM MODE)
MAX5477/78/79 toc10
INTEGRAL NONLINEARITY vs. CODE (VDM MODE)
MAX5477/78/79 toc11
DIFFERENTIAL NONLINEARITY vs. CODE (VDM MODE)
0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.10 -0.12 -0.14 0 MAX5479
MAX5477/78/79 toc12
0.10 0.08 0.06 0.04 DNL (LSB) 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.10 0 32 64 96 MAX5478
0.20 0.16 0.12 0.08 INL (LSB) 0.04 0 -0.04 -0.08 -0.12 -0.16 -0.20 MAX5479
128 160 192 224 256 CODE
0
32
64
96
128 160 192 224 256 CODE
DNL (LSB)
32
64
96
128 160 192 224 256 CODE
INTEGRAL NONLINEARITY vs. CODE (VRM MODE)
MAX5477/78/79 toc13
DIFFERENTIAL NONLINEARITY vs. CODE (VRM MODE)
0.16 0.12 0.08 DNL (LSB) 0.04 0 -0.04 -0.08 -0.12 -0.16 -0.20 MAX5479
MAX5477/78/79 toc14
0.20 0.16 0.12 0.08 INL (LSB) 0.04 0 -0.04 -0.08 -0.12 -0.16 -0.20 0 32 64 96 MAX5479
0.20
128 160 192 224 256 CODE
0
32
64
96
128 160 192 224 256 CODE
CROSSTALK vs. FREQUENCY (MAX5478)
-10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100 0.01 0.1 1 10 100 1000 FREQUENCY (kHz) CW_ = 10pF TAP = 0
MAX5477/78/79 toc15
CROSSTALK vs. FREQUENCY (MAX5479)
-10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100 0.1 1 10 100 1000 10,000 FREQUENCY (kHz) CW_ = 10pF TAP = 128
MAX5477/78/79 toc16
0
0
6
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Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
Typical Operating Characteristics (continued)
(VDD = +5V, H_ = VDD, L_ = GND, TA = +25C, unless otherwise noted.)
MAX5477/MAX5478/MAX5479
MIDSCALE WIPER RESPONSE vs. FREQUENCY (MAX5478)
MAX5477 toc17
MIDSCALE WIPER RESPONSE vs. FREQUENCY (MAX5479)
MAX5477/78/79 toc18
2 1 0 -1 GAIN (dB) CW_ = 10pF
2 1 0 GAIN (dB) -1 -2 -3 -4 -5 CW_ = 50pF 0.1 1 10 FREQUENCY (kHz) 100 CW_ = 10pF
-2 -3 -4 -5 -6 -7 -8 0.1 1 10 FREQUENCY (kHz) 100 1000 CW_ = 50pF
1000
THD+N vs. FREQUENCY (MAX5478)
MAX5477 toc19
THD+N vs. FREQUENCY (MAX5479)
MIDSCALE 1
MAX5477 toc20
10 MIDSCALE 1
10
THD+N (%)
THD+N (%)
0.1
0.1
0.01
0.01
0.001
0.001
0.0001 0.01 0.1 1 FREQUENCY (kHz) 10 100
0.0001 0.01 0.1 1 FREQUENCY (kHz) 10 100
END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE (MAX5478)
MAX5477/78/79 toc21
END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE (MAX5479)
MAX5477/78/79 toc22
SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE
550 500 SUPPLY CURRENT (A) 450 400 350 300 250 200 150 100 50 0 VCC = 3V VCC = 5V WP = GND
MAX5477/78/79 toc23
0.5 END-TO-END RESISTANCE CHANGE (%) 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -40 -15 10 35 60
0.5 END-TO-END RESISTANCE CHANGE (%) 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -40 -15 10 35 60
600
85
85
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 DIGITAL INPUT VOLTAGE (V)
TEMPERATURE (C)
TEMPERATURE (C)
_______________________________________________________________________________________
7
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
Pin Description
PIN TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -- -- THIN QFN 15 14 13 12 11 10 9 7 6 5 4 3 2 1 8, 16 EP NAME HA WA LA HB WB LB WP GND A2 A1 A0 SDA SCL VDD N.C. EP Potentiometer A High Terminal Potentiometer A Wiper Terminal Potentiometer A Low Terminal Potentiometer B High Terminal Potentiometer B Wiper Terminal Potentiometer B Low Terminal Write-Protect Input. Connect to GND to allow changes to the wiper position and the data stored in the EEPROM. Connect to VDD or leave open to enable the write protection of the EEPROM. Ground Address Input 2. Connect to VDD or GND (see Table 1). Address Input 1. Connect to VDD or GND (see Table 1). Address Input 0. Connect to VDD or GND (see Table 1). I2C Serial Data I2C Clock Input Power-Supply Input. Connect a +2.7V to +5.25V power supply to VDD and bypass VDD to GND with a 0.1F capacitor installed as close to the device as possible. No Connection. Do not connect. Exposed Paddle. Do not connect. FUNCTION
SDA tSU:DAT tLOW SCL tHIGH tHD:STA tR START CONDITION (S) PARAMETERS ARE MEASURED FROM 30% TO 70%. tF REPEATED START CONDITION (SR) ACKNOWLEDGE (A) STOP CONDITION (P) START CONDITION (S) tHD:DAT tBUF tSU:STA tHD:STA tSU:STO
Figure 1. I2C Serial-Interface Timing Diagram
Detailed Description
The MAX5477/MAX5478/MAX5479 contain two resistor arrays with 255 elements in each array. The MAX5477 has a total end-to-end resistance of 10k, the MAX5478 has an end-to-end resistance of 50k, and the MAX5479 has an end-to-end resistance of 100k.
The MAX5477/MAX5478/MAX5479 provide access to the high, low, and wiper terminals for a standard voltage-divider configuration. Connect H_, L_, and W_ in any desired configuration as long as their voltages remain between GND and VDD.
8
_______________________________________________________________________________________
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
H_
S256 R255 S255 R254 S254 256-POSITION DECODER S3 R2 WIPER CODE 02h S2 R1 S1 L_ RW W_
A simple 2-wire I2C-compatible serial interface moves the wiper among the 256 tap points (Figure 2). A nonvolatile memory stores the wiper position and recalls the stored wiper position upon power-up. The nonvolatile memory is guaranteed for 50 years for wiper data retention and up to 200,000 wiper store cycles.
Analog Circuitry
The MAX5477/MAX5478/MAX5479 consist of two resistor arrays with 255 resistive elements; 256 tap points are accessible to the wipers, along the resistor string between H_ and L_. The wiper tap point is selected by programming the potentiometer through the I2C interface. An address byte, a command byte, and 8 data bits program the wiper position for each potentiometer. The H_ and L_ terminals of the MAX5477/MAX5478/ MAX5479 are similar to the two end terminals of a mechanical potentiometer. The MAX5477/MAX5478/ MAX5479 feature power-on reset circuitry that loads the wiper position from the nonvolatile memory at power-up.
Digital Interface
The MAX5477/MAX5478/MAX5479 feature an internal, nonvolatile EEPROM that stores the wiper state for initialization during power-up. The shift register decodes the command and address bytes, routing the data to the proper memory registers. Data written to a volatile memory register immediately updates the wiper position, or writes data to a nonvolatile register for storage (see Table 2). The volatile register retains data as long as the device is powered. Removing power clears the volatile register. The nonvolatile register retains data even after power is removed. Upon power-up, the power-on reset circuitry controls the transfer of data from the nonvolatile register to the volatile register. A write-protect feature prevents accidental overwriting of the EEPROM. Connect WP to VDD or leave open to prevent any EEPROM write cycles. The wiper register only updates with the value in the EEPROM when WP =
Figure 2. Potentiometer Configuration
SDA
SCL
S START CONDITION
P STOP CONDITION
Figure 3. Start and Stop Conditions
SDA
0
1
0
1
A2
A1
A0
NOP/W
ACK
START SCL
MSB
LSB
Figure 4. Slave Address _______________________________________________________________________________________ 9
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
Table 1. Slave Addresses
ADDRESS INPUTS A2 GND GND GND GND VDD VDD VDD VDD A1 GND GND VDD VDD GND GND VDD VDD A0 GND VDD GND VDD GND VDD GND VDD SLAVE ADDRESS 0101000 0101001 0101010 0101011 0101100 0101101 0101110 0101111
interface, or if the master in a single-master system has an open-drain SCL output. SCL and SDA should not exceed VDD in a mixed-voltage system, despite the open-drain drivers. Each transmission consists of a START (S) condition (Figure 3) sent by a master, followed by the MAX5477/MAX5478/MAX5479 7-bit slave address plus the NOP/W bit (Figure 4), 1 command byte and 1 data byte, and finally a STOP (P) condition (Figure 3). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master controller signals the beginning of a transmission with a START condition by transitioning SDA from high to low while SCL is high. The master controller issues a STOP condition by transitioning the SDA from low to high while SCL is high, when it finishes communicating with the slave. The bus is then free for another transmission (Figure 3). Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 5). Acknowledge The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 6). Thus, each byte transferred effectively requires 9 bits. The master controller generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, so the SDA line remains stable low during the high period of the clock pulse. Slave Address The MAX5477/MAX5478/MAX5479 have a 7-bit-long slave address (Figure 4). The 8th bit following the 7-bit
VDD. Connect WP to GND to allow write commands to the EEPROM and to update the wiper position from either the value in the EEPROM or directly from the I2C interface. Connecting WP to GND increases the supply current by 19.6A (max). Serial Addressing The MAX5477/MAX5478/MAX5479 operate as slave devices that send and receive data through an I2C-/ SMBusTM-compatible 2-wire serial interface. The interface uses a serial data access (SDA) line and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master, typically a microcontroller, initiates all data transfers to the MAX5477/MAX5478/MAX5479, and generates the SCL clock that synchronizes the data transfer (Figure 1). The MAX5477/MAX5478/MAX5479 SDA line operates as both an input and an open-drain output. The SDA line requires a pullup resistor, typically 4.7k. The MAX5477/MAX5478/MAX5479 SCL line operates only as an input. The SCL line requires a pullup resistor (typically 4.7k) if there are multiple masters on the 2-wire
SDA
START CONDITION SCL 1 2
CLOCK PULSE FOR ACKNOWLEDGMENT
8 NOT ACKNOWLEDGE
9
SCL DATA STABLE, DATA VALID CHANGE OF DATA ALLOWED
SDA
ACKNOWLEDGE
Figure 5. Bit Transfer SMBus is a trademark of Intel Corporation. 10
Figure 6. Acknowledge
______________________________________________________________________________________
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 S SLAVE ADDRESS NOP/W 0 A COMMAND BYTE ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 A P D15 D14 D13 D12 D11 D10 D9 D8
Figure 7. Command Byte Received
ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 D5 D4 D3 D2 D1 D0
HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX5477/MAX5478/MAX5479 REGISTERS ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 S SLAVE ADDRESS NOP/W 0 A
COMMAND BYTE
A
DATA BYTE 1 BYTE
A
P
Figure 8. Command and Single Data Byte Received
slave address is the NOP/W bit. Set the NOP/W bit low for a write command and high for a no-operation command. The MAX5477/MAX5478/MAX5479 provide three address inputs (A0, A1, and A2), allowing up to eight devices to share a common bus (Table 1). The first 4 bits (MSBs) of the MAX5477/MAX5478/MAX5479 slave addresses are always 0101. A2, A1, and A0 set the next 3 bits in the slave address. Connect each address input to VDD or GND to set these 3 bits. Each device must have a unique address to share a common bus.
NVREG: The data byte writes to the nonvolatile memory register. The wiper position is unchanged. NVREGxVREG: Data transfers from the nonvolatile memory register to the volatile memory register (wiper position updates). VREGxNVREG: Data transfers from the volatile memory register into the nonvolatile memory register.
Nonvolatile Memory
The internal EEPROM consists of a 16-bit nonvolatile register that retains the value written to it prior to power down. The nonvolatile register is programmed with the midscale value at the factory. The nonvolatile memory is guaranteed for 50 years for wiper position retention and up to 200,000 wiper write cycles. A write-protect feature prevents accidental overwriting of the EEPROM. Connect WP to VDD or leave open to enable the writeprotect feature. The wiper position only updates with the value in the EEPROM when WP = VDD. Connect WP to GND to allow EEPROM write cycles and to update the wiper position from nonvolatile memory or directly from the I2C serial interface.
Message Format for Writing
Write to the MAX5477/MAX5478/MAX5479 by transmitting the device's slave address with NOP/W (8th bit) set to zero, followed by at least 1 byte of information (Figure 7). The 1st byte of information is the command byte. The bytes received after the command byte are the data bytes. The 1st data byte goes into the internal register of the MAX5477/MAX5478/MAX5479 as selected by the command byte (Figure 8). Command Byte Use the command byte to select the source and destination of the wiper data (nonvolatile or volatile memory registers) and swap data between nonvolatile and volatile memory registers (see Table 2). Command Descriptions VREG: The data byte writes to the volatile memory register and the wiper position updates with the data in the volatile memory register.
Power-Up
Upon power-up, the MAX5477/MAX5478/MAX5479 load the data stored in the nonvolatile memory register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile memory register. This initialization period takes 10s.
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11
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
Table 2. Command Byte Summary
ADDRESS BYTE 1 SCL CYCLE NUMBER VREG NVREG NVREGxVREG VREGxNVREG VREG NVREG NVREGxVREG VREGxNVREG VREG NVREG NVREGxVREG VREGxNVREG 2 3 4 5 6 7 8 9 ACK (A) 0 0 0 0 0 0 0 0 0 0 0 0 START (S) A6 A5 A4 A3 A2 A1 A0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 1 A2 A1 A0 0 COMMAND BYTE 10 11 12 13 14 15 16 17 18 DATA BYTE 19 20 21 22 23 24 25 26 27 STOP NOTES (P)
ACK ACK TX NV V R3 R2 R1 R0 D7 D6 D5 D4 D3 D2 D1 D0 (A) (A) 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1 0 0 1 1 0 0 1 1 0 1 0 0 1 1 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
WIPER A ONLY
WIPER B ONLY
WIPERS A AND B
Standby
The MAX5477/MAX5478/MAX5479 feature a low-power standby mode. When the device is not being programmed, it enters into standby mode and supply current drops to 500nA (typ).
ing and gain to the resistor-divider network made by the potentiometer (Figure 9) or by a fixed resistor and a variable resistor (see Figure 10).
Programmable Filter
Figure 11 shows the MAX5477/MAX5478/MAX5479 in a 1st-order programmable application filter. Adjust the gain of the filter with R2, and set the cutoff frequency with R3. Use the following equations to calculate the gain (A) and the -3dB cutoff frequency (fC): A = 1+ fC = R1 R2 1
Applications Information
The MAX5477/MAX5478/MAX5479 are ideal for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the display contrast), or for programmable filters with adjustable gain and/or cutoff frequency.
Positive LCD Bias Control
Figures 9 and 10 show an application where the MAX5477/MAX5478/MAX5479 provide an adjustable, positive LCD bias voltage. The op amp provides buffer-
2 x R 3 x C
5V 5V H_ 30V MAX5477 MAX5478 MAX5479 L_ W_ MAX480 VOUT MAX5477 MAX5478 MAX5479 L_ H_ MAX480 VOUT 30V
W_
Figure 9. Positive LCD Bias Control Using a Voltage-Divider 12
Figure 10. Positive LCD Bias Control Using a Variable Resistor
______________________________________________________________________________________
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
WA V+ VIN LA HA R3 C MAX410 VOUT 7 3 1 8 R1 HB 2 MAX410 4 R1 HB 6 R2 = RHL x D / 256 WHERE RHL = END-TO-END RESISTANCE AND = D DECIMAL VALUE OF WIPER CODE HA 5V WA
1/2 MAX5477
LA
MAX5477 MAX5478 MAX5479
R2, R3 = RHL x D / 256 WHERE RHL = END-TO-END RESISTANCE AND D = DECIMAL VALUE OF WIPER CODE R2
V-
WB R2 LB
1/2 MAX5477
WB LB
Figure 11. Programmable Filter
5V
Figure 12. Offset Voltage Adjustment Circuit
IN
OUT HA
V OUT1
IN
OUT HB
VOUT2
MAX6160
ADJ GND WA R LA
MAX6160 1/2 MAX5477 1/2 MAX5478 1/2 MAX5479
ADJ GND WB R LB
1/2 MAX5477 1/2 MAX5478 1/2 MAX5479
10k FOR THE MAX5477 R 50k VOUT_ = 1.23V x FOR THE MAX5478 R 100k VOUT_ = 1.23V x FOR THE MAX5479 R VOUT_ = 1.23V x WHERE R = RHL x D / 256 AND D = DECIMAL VALUE OF WIPER CODE
Figure 13. Adjustable Voltage Reference
Offset Voltage and Gain Adjustment
Pin Configurations
TOP VIEW
N.C. 16 VDD SCL SDA A0 1 2 3 4 5 A1 6 A2 7 GND 8 N.C. HA 15 WA 14 LA 13 HA 1 12 HB WA LA 2 3 14 VDD 13 SCL
Connect the high and low terminals of one potentiometer of a MAX5477 between the NULL inputs of a MAX410 and the wiper to the op amp's positive supply to nullify the offset voltage over the operating temperature range. Install the other potentiometer in the feedback path to adjust the gain of the MAX410 (Figure 12).
Adjustable Voltage Reference
Figure 13 shows the MAX5477/MAX5478/MAX5479 used as the feedback resistors in multiple adjustable voltage reference applications. Independently adjust the output voltages of the MAX6160 parts from 1.23V to V IN - 0.2V by changing the wiper positions of the MAX5477/MAX5478/MAX5479.
MAX5477 MAX5478 MAX5479
11 WB 10 LB 9 WP
HB 4 WB 5 LB 6 WP 7
MAX5477 MAX5478 MAX5479
12 SDA 11 A0 10 A1 9 8 A2 GND
THIN QFN (3mm x 3mm)
TSSOP (4.4mm x 5mm)
Chip Information
TRANSISTOR COUNT: 12,651 PROCESS: BiCMOS
13
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Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers MAX5477/MAX5478/MAX5479
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
12x16L QFN THIN.EPS
E
1 2
D2 b
0.10 M C A B
D D/2
D2/2
E/2
E2/2
C L
E
(NE - 1) X e
E2
L
C L
e
k (ND - 1) X e
C L
0.10 C 0.08 C A A2 A1 L
C L
L
e
e
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
EXPOSED PAD VARIATIONS
DOWN BONDS ALLOWED
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
2
2
14
______________________________________________________________________________________
Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX5477/MAX5478/MAX5479
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
15 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
TSSOP4.40mm.EPS


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